AX8052F100: Ultra-low Power Microcontroller for RF Applications

Perfect solution for ultra-low power RF applications.

 

Key Benefits

  • 64 kbyte Flash and 8.25 kbyte SRAM memory
  • Ultra-low power MCU with highly flexible clocking scheme
  • DMA controller
  • AES engine with dedicated DMA controller and true random number generator1
  • Radio interface with direct map to address space
  • Advanced graphic Integrated Development Environment (IDE) complete with C-compiler
  • Hardware debug unit
    • No limit on breakpoints
    • Dedicated UART for debugging via debug link interface

 

Excerpt from Datasheet

  • Supply voltage range 1.8 ... 3.6 V
  • Operating temperature range -40 - 85 oC
  • Deep sleep current 50 nA
  • CPU active mode current 150 µA/MHz
  • Sleep mode current (256 Bytes RAM retention, wakeup from pin) 450 nA
  • Sleep mode current (256 Bytes RAM retention, wakeup timer) 800 nA
  • Sleep mode current (4.25 kBytes RAM retention, wakeup timer) 1.5 µA
  • Sleep mode current (8.25 kBytes RAM retention, wakeup timer) 2.2 µA
  • FLASH memory 64 kbyte
  • RAM memory 8 kbyte

 

Description

Ultra-low power microcontroller

The AX8052F100 is an ultra-low power microcontroller. It is optimized for use in battery powered applications together with RF ICs. The AX8052F100 offers high integration with attractive peripheral blocks, small footprint, easy communication with RF ICs, flexibility and ultra-low power consumption.

AX8052 microcontroller core

The AX8052F100 microcontroller core executes the industry standard 8052 instruction set. The system clock can be programmed freely from DC to 20 MHz. As instructions are executed in a single cycle, the core can deliver 20 MIPS. A 64 kByte flash memory is provided, allowing to program applications in C. A fully associative cache and a pre-fetch controller hide the latency of the flash memory.
AX8052F100 specifically targets ultra-low power applications. Four system clock sources can be selected on the fly, allowing to flexibly adapt the system speed to varying application needs. The core consumes 150 µA/MHz and AX8052F100 consumes 800 nA in sleep mode with wake-up timer running.

Powerful peripherals

The AX8052F100 features a dual channel DMA engine that can transfer data to and from XRAM to any peripheral on chip. A dedicated AES engine with own DMA engine is provided for encryption. Further peripherals include three general purpose timers with optional sigma-delta or PWM output mode. The timers can be used as baud rate generators for the two UARTs. A master/slave SPI interface is provided. A 10-bit, 500 kSample/s ADC with flexible input modes, as well as comparators allow to interface with analog data streams.

Easy access to RF ICs

The AX8052F100 has a specialized SPI master interface that can be used as an interface to radio ICs. It maps the radio chip registers directly into the X-bus address space.

Productivity enhancing complete development tool suite

A hardware debug unit considerably eases debugging compared to other 8052 microcontrollers. The debug unit communicates with a host PC running the debugger using a 3-wire interface. Unlimited breakpoints as well as a dedicated UART for debugging via debug link interface are provided. AX8052F100 is supported by the AXSEM development kit DVK-2.
The AXSEM development tools consist of the advanced graphic integrated development environment AX8052-IDE, complete with register, breakpoint, watch and interface windows. This graphic environment talks to the AXSEM symbolic command line debugger (AXSDB). AXSDB is fully scriptable, enabling implementation of automated tasks.

 

AX8052F100 Blockdiagram

 

Features

AX8052 Core

  • Industry standard 8052 instruction set
  • High performance core, most instructions require only 1 clock per instruction byte
  • 20 MIPS
  • Dual DPTR for high speed memory copies
  • 22 interrupt vectors

Debugger

  • 3-wire (1 dedicated, 2 shared with GPIO Pins) debugger interface
  • True hardware debugger with breakpoints and single stepping support
  • User programmable 64bit key to restrict debugging to authorized personnel
  • DebugLink interface allows "printf" style debugging without utilizing a UART or GPIO pins

Memory

  • 64 kByte FLASH
  • 8.25 kByte RAM
  • High performance memory crossbar

Clocking

  • 4 clock sources
    • on-chip 20 MHz RC-oscillator
    • 10 kHz/640 Hz ultra-lowpower RC-oscillator
    • fast crystal oscillator
    • low power tuning fork crystal oscillator
  • Fully automatic calibration of on-chip RC oscillators to a reference clock
  • Clock monitor can detect failures of the main clock and switch to the on-chip fast RC oscillator
  • Watchdog

Power Modes

  • Standby, sleep and deep sleep power modes for very low idle power consumption
  • On-chip power-on reset and brown out detection
  • Unrestricted operation from 1.8 V-3.6 V VDDIO

16-bit Wakeup Timer

  • 2 counting registers
  • 4 event registers allow flexible wakeup and software schedules

GPIO

  • 24 GPIO pins
  • PB0-PB7, PC0-PC3 and PR0-PR5 5 V tolerant inputs
  • All GPIO pins support individually programmable pull-ups and interrupt on change
  • Flexible allocation of GPIO pins to peripherals

16-bit General Purpose Timer (3x)

  • Saw tooth and triangle modes
  • Sigma-Delta mode converts timer into a DAC
  • Optional double buffering of the PERIOD register allows controlled frequency changes
  • Optional high-byte buffering allows atomic 16-bit accesses
  • Flexible clocking options, can use any internal or an external clock source
  • Pre-scaler included

16-bit Output Compare Unit (2x)

  • Used together with a General Purpose Timer to create PWM waveforms
  • Optional double buffering

16-bit Input Capture Unit (2x)

  • Used together with a General Purpose Timer to time events on an external or internal signal
  • UART (2x)
  • 5-9 bit word length, 1-2 stop bits
  • Uses one of the General Purpose Timers as baud rate generator

Dedicated Radio Master SPI Interface

  • Compatible to AXSEM RF and other peripherals
  • Efficient CPU access

Master/Slave SPI

  • Supports 3 and 4 wire variants

ADC

  • 10-bit 500 kSamples/s ADC
  • Up to 8 channels
  • Single ended and differential sampling
  • x0.1, x1 and x10 gain amplifier
  • Internal 1 V or external reference
  • Flexibly programmable conversion schedule
  • Built-in temperature sensor

Analog Comparators

  • Internal or external reference
  • Output signal may be routed to GPIO, read by software, or used as input capture trigger

Dedicated Interface to AXSEM Transceiver IC

  • Easy access to transceiver registers by mapping transceiver registers into X address space
  • Transceiver crystal may clock MCU

DMA controller

  • 2 independent DMA channels
  • Moves data between X-RAM and most on-chip peripherals
  • Cycle-steal and round-robin memory arbitration ensure minimal impact on AX8052 core
  • Chained buffer descriptors allow arbitrarily elaborate buffering
  • Schemes and flexible interrupt generation

AES1

  • Dedicated AES crypto controller
  • Dedicated DMA engine to fetch input data and key stream from X-RAM and strobe output data into X-RAM
  • Multi Megabit/s data rates
  • Supports AES-128, AES-192 and AES-256 international standards
  • Programmable round number and software key schedule generation allow longer key lengths for higher security applications
  • ECB, CFB and OFB chaining modes

AX8052F100 Applicaton Circuit Diagram

True Random Number Generator (RNG)1

  • Cryptographic random numbers

Small Footprint 28 pin 5mm x 5mm package

 

Development Tools & Kits

 

Applications

Ultra-low power battery powered devices

  • Automatic meter reading
  • Remote keyless entry
  • Home automation
  • Wireless networks
  • Wireless audio
  • Telemetric applications

 

 

 

 

Ordering Information

Item Order Code
AX8052F100 Cut Tape 10 pcs AX8052F100-10PCS-CTAPE
AX8052F100 Cut Tape 100 pcs AX8052F100-100PCS-CTAPE
AX8052F100 Reel 500 pcs AX8052F100-500PCS-REEL
AX8052F100 Reel 2000 pcs AX8052F100-2000PCS-REEL

 

Product Documents Download

AX8052F100 Flyer 1.26 MB download link

AX8052F100 Datasheet Version:1.2 1.98 MB login required
AX8052 Family Programming Manual Version:1.4 954.84 KB login required
AX8052 Silicon Errata Version:1.3 62.5 KB login required

Development Kit (DVK-2) Flyer 1.02 MB download link

 

Software Downloads

AX8052-IDE Software Package (Windows installer). Includes AXCode::Blocks, AXSDB Debugger, SDCC Compiler, LibMF AX8052 Support Library, LibAXDVK2 (DVK-2 Support Library) Version:1.8 38.95 MB login required

AX8052-IDE Software Package (Binary RPMs for Fedora 16 x86_64). Includes AXCode::Blocks, AXSDB Debugger, SDCC Compiler, LibMF AX8052 Support Library, LibAXDVK2 (DVK-2 Support Library) Version:1.8 14.67 MB login required

AX8052-IDE Software Package (Source RPMs under GNU Public License) Version:1.8 10.88 MB login required

AX-MicroLab Configurator and Example Code Generator for AX8052Fxx MCUs (Windows Installer) Version:1.5b 6.09 MB login required

 

Further information and down loads AX8052 Software

 

 link site page
Further information and downloads AX-MicroLab

 

 link site page

 

1The AES engine as well as the true random number generator need to be enabled and supported in software. For more information contact This e-mail address is being protected from spambots. You need JavaScript enabled to view it